The requirements of the system on chip (SOC) and SIP industry for ever higher speeds, performance and pin counts means that test systems must offer greater functionality while maintaining low cost of test. This may pose challenges when designing automatic test equipment (ATE) to be configurable to test different types of devices.
Automatic test equipment provides two types of resources: a) Pin Electronics (PE) channels and programmable power supplies (PPS) channels. The number of PE channels and the number of PPS channels in current testers can be scaled depending on the desired parallelism. However, the PE to PPS ratio tends to be inflexible. The reason for this is because the tester hardware of the ATE is broken into modules which contain a specific number of PE channels and PPS channels. That is, a module inflexibly includes x-PE channels and y-PPS channels. The way to scale the number of channels (e.g., either PE or PPS channels) is to add more tester modules. This increases both the PE and PPS channel counts together.
This PPS/PE ratio inflexibility causes problems in current implantation of ATEs. This is because the trend for test is to use just a few signal pins in test mode, but the number of power supplies remains un-changed. For example, inflexibility occurs when more of one resource is desired but none of the other (e.g., want more PPS channels, but no PE channels). In that case, when adding more modules to increase the desired resource, the number of undesired resource channels also increases. As such, historically, since it is impossible to control the ratio of PPS channels to the number of PE channels, the ATE hardware efficiency goes down.